? semiconductor components industries, llc, 2015 november, 2015 ? rev. 11 1 publication order number: NTGD1100L/d NTGD1100L, stgd1100l power mosfet 8 v, 3.3 a, load switch with level?shift, p?channel, tsop?6 the NTGD1100L integrates a p and n?channel mosfet in a single package. this device is particularly suited for portable electronic equipment where low control signals, low battery voltages and high load currents are needed. the p?channel device is specifically designed as a load switch using on semiconductor state?of?the?art trench technology. the n?channel, with an external resistor (r1), functions as a level?shift to drive the p?channel. the n?channel mosfet has internal esd protection and can be driven by logic signals as low as 1.5 v. the NTGD1100L operates on supply lines from 1.8 to 8.0 v and can drive loads up to 3.3 a with 8.0 v applied to both v in and v on/off features ? extremely low r ds(on) load switch mosfet ? level shift mosfet is esd protected ? low profile, small footprint package ? v in range 1.8 to 8.0 v ? on/off range 1.5 to 8.0 v ? esd rating of 2000 v ? these devices are pb?free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit input voltage (v dss , p?ch) v in 8.0 v on/off voltage (v gs , n?ch) v on/off 8.0 v continuous load curren t (note 1) stead y state t a = 25 c i l 3.3 a t a = 85 c 2.4 power dissipation (note 1) stead y state t a = 25 c p d 0.83 w t a = 85 c 0.43 pulsed load current tp = 10 s i lm 10 a operating junction and storage temperature t j , t stg ?55 to 150 c source current (body diode) i s ?1.0 a esd rating, mil?std?883d hbm (100 pf, 1.5 k ) esd 2.0 kv lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. surface?mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces). 1 2,3 5 6 simplified schematic tsop?6 case 318g style 11 marking diagram & pin assignment tz m 3 d2 1 s1 s2 4 2 d2 g1 5 d1/g2 6 4 q2 q1 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. 8.0 v 55 m @ ?2.5 v 40 m @ ?4.5 v r ds(on) typ 3.3 a i d max v (br)dss 80 m @ ?1.8 v device package shipping ? ordering information NTGD1100L t1g tsop?6 (pb?free) 3000 / tape & ree l www. onsemi.com 1 tz = specific device code m = date code* = pb?free package (note: microdot may be in either location) *date code orientation may vary depending upon manufacturing location. stgd1100l t1g tsop?6 (pb?free) 3000 / tape & ree l
NTGD1100L, stgd1100l www. onsemi.com 2 thermal resistance ratings rating symbol max unit junction?to?ambient ? steady state (note 2) r ja 150 c/w junction?to?foot ? steady state (note 2) r jf 50 2. surface?mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces). electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol test condition min typ max unit off characteristics q2 drain?to?source breakdown voltage v in v gs2 = 0 v, i d2 = ?250 a 8.0 v forward leakage current i fl v gs1 = 0 v, v ds1 = 8.0 v t j = 25 c 1.0 a t j = 125 c 10 q2 gate?to?source leakage current i gss v ds2 = 0 v, v gs2 = 8.0 v 100 na q2 diode forward on?voltage v sd i s = ?1.0 a, v gs2 = 0 v ?0.7 ?1.0 v on characteristics voltage on/off v on/off 1.5 8.0 v q1 gate threshold voltage v gs1 v gs1 = v ds1 , i d = 50 a 0.6 1.2 v input voltage v in v gs2 = v ds2 , i d = 250 a 1.8 8.0 v q2 drain?to?source on resistance r ds(on) v on/off = 1.5 v, i l = 1.0 a v in = 4.5 v 40 55 m v in = 2.5 v 55 70 v in = 1.8 v 80 140 load current i l v drop 0.2 v, v in = 5.0 v, v on/off = 1.5 v 1.0 a v drop 0.2 v, v in = 2.5 v, v on/off = 1.5 v 1.0 v drop 0.2 v, v in = 1.8 v, v on/off = 1.5 v 1.0 product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 1 2,3 5 6 figure 1. load switch application 4 q2 q1 6 c1 c o c i r1 r2 r2 on/off v in v out load gnd components description values r1 pullup resistor typical 10 k to 1.0 m r2 optional slew?rate control typical 0 to 100 k c0 output capacitance usually < 1.0 f c1 optional in?rush current control typical 1000 pf
NTGD1100L, stgd1100l www. onsemi.com 3 typical characteristics 0 0.050 0.100 0.150 0.200 0.250 0.300 0.350 0.400 0 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 i l , (a) v drop , (v) t j = 25 c t j = 125 c figure 2. v drop vs. i l @ v in = 2.5 v figure 3. v drop vs. i l @ v in = 4.5 v 0 0.050 0.100 0.150 0.200 0.250 0.300 0 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 i l , (a) v drop , (v) t j = 125 c t j = 25 c v in , (v) r ds(on) , drain?to?source resistance ( ) t j = 125 c 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 t j = 25 c i l = 1.0 a v on/off = 1.5 to 8.0 v figure 4. on resistance vs. input voltage figure 5. on resistance variation with temperature r ds(on) , drain?to?source resistance ( ) 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11 0.12 0.13 0.14 0.15 ?50 ?25 0 25 50 75 100 125 150 t j , junction temperature ( c) v in = 1.8 v v in = 5.0 v i l = 1.0 a v on/off = 1.5 to 8.0 v t j , temperature junction ( c) r ds(on) , drain?to?source resistance (normalized) 1.7 ?50 ?25 0 25 50 75 100 125 150 i l = 1.0 a v on/off = 1.5 to 8.0 v figure 6. normalized on resistance variation with temperature 1.5 1.3 1.1 0.9 0.7 v in = 1.8 v v in = 5.0 v 0.22 0.24 0.26 0.28 0.30 0.32 0.34 0.36 0.38 0.40 0.42 0.44 0.46 0.48 0.50
NTGD1100L, stgd1100l www. onsemi.com 4 typical characteristics 0 5 10 15 20 25 30 35 40 45 50 55 60 01234567 8 r2 (k ) time ( s) i l = 1.0 a v on/off = 3.0 v c1 = 10 f c0 = 1.0 f t d(off) t d(on) t f t r figure 7. switching variation r2 @ v in = 4.5 v, r1 = 20 k 0 5 10 15 20 25 30 35 40 45 50 55 60 012345678 r2 (k ) time ( s) i l = 1.0 a v on/off = 1.5 v c1 = 10 f c0 = 1.0 f t d(off) t d(on) t f t r figure 8. switching variation r2 @ v in = 4.5 v, r1 = 20 k figure 9. switching variation r2 @ v in = 2.5 v, r1 = 20 k 0 5 10 15 20 25 30 35 40 012345678 r2 (k ) time ( s) i l = 1.0 a v on/off = 1.5 v c1 = 10 f c0 = 1.0 f t d(off) t d(on) t f t r figure 10. switching variation r2 @ v in = 2.5 v, r1 = 20 k r2 (k ) time ( s) t d(off) t d(on) t f t r 0 5 10 15 20 25 30 01234567 8 i l = 1.0 a v on/off = 3.0 v c1 = 10 f c0 = 1.0 f 1e?03 1e?02 1e?01 1e+00 1e+01 1e+02 1e+ 03 figure 11. fet thermal response normalized to r ja at steady state (1 inch pad) 1.0 0.1 0.01 square wave pulse duration time, t (sec) r ja(t) , effective transient thermal response d = 0.5 0.2 0.1 0.05 0.02 single pulse 0.01
NTGD1100L, stgd1100l www. onsemi.com 5 package dimensions case 318g?02 issue v 23 4 5 6 d 1 e b e1 a1 a 0.05 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimensions d and e1 are determined at datum h. 5. pin one indicator must be located in the indicated zone. c *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min nom max millimeters 0.90 1.00 1.10 a1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 d 2.90 3.00 3.10 e 2.50 2.75 3.00 e 0.85 0.95 1.05 l 0.20 0.40 0.60 0.25 bsc l2 ? 0 1 0 1.30 1.50 1.70 e1 e recommended note 5 l c m h l2 seating plane gauge plane detail z detail z 0.60 6x 3.20 0.95 6x 0.95 pitch dimensions: millimeters m style 11: pin 1. source 1 2. drain 2 3. drain 2 4. source 2 5. gate 1 6. drain 1/gate 2 on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NTGD1100L/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
|
